1. Field of the Invention
The present invention generally relates to general purpose digital data processing systems and more particularly relates to transfer instructions for such systems receiving virtual addresses from application programs which must be translated into absolute addresses.
2. Description of the Prior Art
It is now common in large scale data processing systems to permit software developers to treat real storage as virtual memory. This is a technique wherein all memory accesses by a specific use program are relative in nature. The major advantage of this approach is that memory management can be efficiently performed by the system at the time of program execution depending upon resource availability and requests from the users. This memory management appears transparent to the user. The 2200/900 system available from the assignee of the present invention including explanatory documentation, and incorporated herein by reference, is such a system employing virtual addressing.
This system, as well as all other systems utilizing virtual addresses, must convert instructions in the operating programs from virtual to real addresses. To translate from the virtual address some systems such as U.S. Pat. No. 4,827,406 issued to Bischoff et al. use a translation table.
Nguyen et al. U.S. Pat. No. 5,414,821 describes the 2200/900 computer system of Unisys which employs virtual addressing converted to an absolute address by adding a base address to an offset provided by the virtual address. Nguyen et al., assigned to the same assignee as the present invention, is hereby also incorporated by reference.
Essentially these systems accomplish the translation from virtual addresses to absolute addresses by providing a base address, which indicates one of a plurality of base memories, plus an offset value, which indicates a particular word location within the indicated base memory, and summing the two together. The summing operation is performed using an special adder which sums the two quantities to provide a unique absolute address. The information needed to perform this operation is provided by the instruction which contains both the base address and the offset value for summation. This approach includes transfer instructions. Since both the base address and the offset are obtained from the instruction and are summed to obtain each absolute address, this effectively makes an implicit assumption that the transfer instruction will be to a different base address. For particular transfer instructions however this is not the case and the transfer remains within the same base memory address. Since the base address does not change, and since the base address typically remains within a hardware register, advantage could be taken of the fact that the base address does not change to eliminate some of the processing steps to reduce the response time for these particular transfer instructions.
None of the existing instruction processors have provisions for using the previous base address for transfer instructions which remain within a given base memory to reduce the instruction response time.